Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing.
Kostas AdaosG. Ph. AlexiouNikos KanopoulosPublished in: ICECS (1999)
Keyphrases
- rapid prototyping
- efficient implementation
- digital signal processing
- hardware implementation
- signal processing
- development environment
- highly parallel
- data flow
- agent oriented programming
- power dissipation
- field programmable gate array
- image processing
- active set
- low power
- massively parallel
- computer vision and image processing
- graphics processing units
- parallel computing
- parallel processing
- multi agent systems
- image segmentation
- case study