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High speed efficient FPGA implementation of pipelined AES S-Box.

Soufiane OukiliSeddik BriA. V. Senthil Kumar
Published in: CIST (2016)
Keyphrases
  • s box
  • high speed
  • fpga implementation
  • advanced encryption standard
  • real time
  • hardware implementation
  • chaotic map
  • block cipher
  • image processing
  • lightweight
  • software systems
  • control strategy