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A low jitter 0.3-165 MHz CMOS PLL frequency synthesizer for 3 V/5 V operation.

Howard C. YangLance K. LeeRamon S. Co
Published in: IEEE J. Solid State Circuits (1997)
Keyphrases
  • high speed
  • cmos technology
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  • neural network
  • circuit design
  • single chip
  • vlsi circuits