A Repartitioning and HW/SW Partitioning Algorithm to the Automatic Design Space Exploration in the Co-Synthesis of Embedded Systems.
Francisco Assis M. do NascimentoWolfgang RosenstielPublished in: SBCCI (2001)
Keyphrases
- hw sw
- embedded systems
- hardware software partitioning
- partitioning algorithm
- design space exploration
- hardware software
- design space
- low cost
- design methodology
- design process
- graph partitioning
- computer architecture
- field programmable gate array
- software systems
- real time
- high performance computing
- hardware and software
- information systems
- computer vision
- machine learning