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Low-power and high-speed SRAM cells for double-node-upset recovery.
Shuo Cai
Yan Wen
Caicai Xie
Weizheng Wang
Fei Yu
Published in:
Integr. (2023)
Keyphrases
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low power
high speed
power consumption
low cost
single chip
wireless transmission
logic circuits
real time
high power
power reduction
vlsi circuits
low power consumption
vlsi architecture
cmos technology
digital signal processing
image sensor
frame rate