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Hardware implementation aspects of a detector based on successive interference cancellation in a DS/CDMA system.
Thomas Olsson
Carl Magnus Jönsson
Viktor Öwall
Peter Nilsson
Published in:
PIMRC (1998)
Keyphrases
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hardware implementation
efficient implementation
signal processing
hardware design
software implementation
dedicated hardware
image processing algorithms
fpga implementation
neural network
hardware architecture
field programmable gate array
pipeline architecture
parallel architecture
memory management
multipath
pattern recognition
image binarization
shift register
pipelined architecture
processing elements
high speed
feature extraction
information systems
data mining