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H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture.
Adam Major
Ioannis Nousias
Sami Khawam
Mark Milward
Ying Yi
Mark Muir
Tughrul Arslan
Published in:
FPL (2007)
Keyphrases
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compressed video sequences
instruction set
level parallelism
computer technology
rate control
computational complexity
management system
bit rate
video streams
real time
record linkage
low complexity
deblocking filter
instructional design
rate distortion
video coding
multimedia