Evaluation of three 32-bit CMOS adders in DCVS logic for self-timed circuits.
Gustavo A. RuizPublished in: IEEE J. Solid State Circuits (1998)
Keyphrases
- random access memory
- delay insensitive
- low power
- flip flops
- power dissipation
- high speed
- asynchronous circuits
- chip design
- analog vlsi
- shift register
- logic circuits
- low voltage
- power consumption
- logic synthesis
- floating gate
- cmos technology
- vlsi circuits
- circuit design
- design considerations
- evaluation method
- real time
- bit parallel
- modal logic
- low cost
- logical operations
- defeasible logic
- infrared
- logic programming