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Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices.
Dario Cozzi
Claudia Farè
Alessandro Meroni
Vincenzo Rana
Marco D. Santambrogio
Donatella Sciuto
Published in:
ACM Great Lakes Symposium on VLSI (2009)
Keyphrases
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reconfigurable hardware
low cost
real time
hardware design
low power consumption
embedded systems
user interface
hardware architecture
hardware implementation
field programmable gate array
case study
single chip
mobile applications
mobile devices
routing algorithm
design process
digital signal