Design of High Stability and Low Power 7T SRAM Cell in 32-NM CNTFET Technology.
M. ElangovanM. MuthukrishnanPublished in: J. Circuits Syst. Comput. (2022)
Keyphrases
- low power
- cmos technology
- nm technology
- power consumption
- low power consumption
- gate array
- low cost
- high speed
- single chip
- logic circuits
- power dissipation
- vlsi architecture
- wireless transmission
- power reduction
- mixed signal
- digital signal processing
- vlsi circuits
- cmos image sensor
- ultra low power
- high power
- parallel processing
- low voltage
- silicon on insulator
- design process