A High-Performance FPGA Accelerator for CUR Decomposition.
M. A. A AbdelgawadRay C. C. CheungHong YanPublished in: FPL (2022)
Keyphrases
- field programmable gate array
- low power consumption
- hardware implementation
- high speed
- compute intensive
- parallel computing
- real time image processing
- parallel implementation
- embedded systems
- hardware design
- computing systems
- real time
- low cost
- high efficiency
- massively parallel
- decomposition method
- fpga implementation
- decomposition algorithm
- hardware architecture
- scientific computing
- fpga device
- fpga technology
- image decomposition
- high reliability
- low rank
- signal processing
- general purpose
- data sets