Power, performance, and area evaluation across 180nm-28nm technology nodes based on benchmark circuits.
Minghui YinZhiqiang LiWeihua ZhangHongwei LiuHuanhuan ZhouYunxia YouChen WangPublished in: IEICE Electron. Express (2024)
Keyphrases
- nm technology
- power dissipation
- power consumption
- low power
- cmos technology
- power reduction
- power management
- digital signal processing
- directed graph
- power saving
- clock gating
- logic circuits
- analog circuits
- finite state machines
- delay insensitive
- real time
- signal processing
- high speed
- quantitative evaluation
- efficient implementation
- parallel processing
- shortest path
- low cost
- xml documents