A 5.4-GHz Low-Power Swallow-Conterless Frequency Synthesizer with a Nonliear PFD.
Yue-Fang KuoRo-Min WengChun-Yu LiuPublished in: VLSI-SoC (2006)
Keyphrases
- low power
- high speed
- power consumption
- clock frequency
- low cost
- high power
- single chip
- wireless transmission
- logic circuits
- dielectric constant
- vlsi architecture
- low power consumption
- real time
- cmos technology
- image sensor
- low frequency
- digital signal processing
- delay insensitive
- vlsi circuits
- mixed signal
- hardware and software
- signal processor
- gate array