Hardware implementation of a multi-rate real-time speech codec.
Bruce BukietRoderick J. RaglandJohn DamoulakisPublished in: ECST (1987)
Keyphrases
- hardware implementation
- dedicated hardware
- real time
- fpga implementation
- fpga device
- efficient implementation
- signal processing
- pipelined architecture
- fpga technology
- general purpose processors
- hardware design
- software implementation
- field programmable gate array
- hardware architecture
- speech recognition
- image processing algorithms
- parallel architecture
- memory management
- image binarization
- pipeline architecture
- video coding
- low cost
- pattern recognition
- data processing
- motion estimation