BluSTL: Controller Synthesis from Signal Temporal Logic Specifications.
Alexandre DonzéVasumathi RamanPublished in: ARCH@CPSWeek (2015)
Keyphrases
- temporal logic
- controller synthesis
- concurrent systems
- transition systems
- model checking
- model checker
- reactive systems
- bounded model checking
- formal specification language
- autonomic computing systems
- modal logic
- formal specification
- satisfiability problem
- closed loop
- control algorithm
- linear temporal logic
- control system
- mazurkiewicz traces
- formal verification
- temporal knowledge
- verification method
- autonomic systems
- automata theoretic
- neural network
- computation tree logic
- dynamic constraints
- control flow
- data flow
- belief revision
- mobile robot
- multi agent systems
- multi agent
- knowledge base