Smart bit-width allocation for low power optimization in a systemc based ASIC design environment.
Arindam MallikDebjit SinhaPrithviraj BanerjeeHai ZhouPublished in: DATE (2006)
Keyphrases
- low power
- single chip
- low cost
- low power consumption
- high speed
- power consumption
- logic circuits
- vlsi architecture
- cmos technology
- design methodology
- gate array
- mixed signal
- digital signal processing
- real time
- cmos image sensor
- vlsi circuits
- high power
- delay insensitive
- wireless transmission
- ultra low power
- circuit design
- analog to digital converter
- signal processor
- video coding
- test bed
- application specific
- power dissipation
- hardware architecture