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Entwurf eines generischen, applikationsspezifischen, transportgesteuerten Prozessor-Modells in VHDL und Validierung auf einem FPGA.
Stefan Hauser
Published in:
Informatiktage (2010)
Keyphrases
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field programmable gate array
hardware implementation
hardware design
fpga implementation
hardware description language
embedded systems
programmable logic
image processing algorithms
fpga device
hardware architecture
software implementation
parallel computing
computing systems
efficient implementation
signal processing
xilinx virtex
high speed
dedicated hardware
fpga hardware
real time
data sets
fpga technology
low cost
real time image processing
pattern recognition
low power consumption
integrated circuit
reconfigurable hardware
computer vision
information systems
data structure
verilog hdl
genetic algorithm
pipelined architecture
image sequences
bayesian networks
hardware software
evolutionary algorithm
data acquisition