An efficient dynamically reconfigurable on-chip network architecture.

Mehdi Modarressi Hamid Sarbazi-Azad Arash Tavakkol

Published in: DAC (2010)

Keyphrases

network architecture
artificial neural
neural network
network design
neural network model
low cost
high speed
biologically plausible
data sets
network infrastructure
real time
activation function
vlsi implementation
connection weights