Multiplier-less Realization of a Poly-phase Filter Using LUT-based FPGAs.

Richard H. Turner Roger F. Woods Tim Courtney

Published in: FPL (2002)

Keyphrases

hardware implementation
refinement step
embedded systems
floating point
lookup table
preprocessing step
field programmable gate array
preprocessing phase
efficient implementation
noise reduction
median filter
filtering algorithm
interior point methods
nonlinear filters
type ii
fpga implementation