A 40-GHz phase-locked loop front-end for 60-GHz transceivers in 65nm CMOS.

Hammad M. Cheema Reza Mahmoudi Arthur H. M. van Roermund

Published in: APCCAS (2010)

Keyphrases

high speed
power consumption
intel xeon
frequency band
low cost
dual band
phase locked loop
neural network
multiscale
intrusion detection
back end
low voltage
dielectric constant