Login / Signup
Level Shifters and DCVSL for a Low-Voltage CMOS 4.2-V Buck Converter.
José F. da Rocha
Marcelino Bicho Dos Santos
José M. Dores Costa
Floriberto A. Lima
Published in:
IEEE Trans. Ind. Electron. (2008)
Keyphrases
</>
low voltage
design considerations
power line
power management
random access memory
cmos technology
high speed
data center