A Novel Approach to the Design of a Linearized Widely Tunable Very Low Power and Low Noise Differential Transconductor.

Hamid Reza Sadr M. N

Published in: PATMOS (2005)

Keyphrases

low power
low power consumption
single chip
power consumption
low cost
high speed
vlsi architecture
logic circuits
digital signal processing
gate array
power dissipation
mixed signal
cmos technology
power reduction
ultra low power
design process
high power
power saving
vlsi circuits
noise level