Novel Gating Technique in D-Latch for Low Power Application.

Akanksha Singh Ayushi Marwah Shyam Akashe

Published in: ICTCS (2016)

Keyphrases

low power
power consumption
low cost
high speed
wireless transmission
high power
single chip
vlsi architecture
ultra low power
cmos technology
gate array
access control
application specific
power dissipation
vlsi circuits