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6.2 133Mpixel 60fps CMOS image sensor with 32-column shared high-speed column-parallel SAR ADCs.

Ryohei FunatsuSteven HuangTakayuki YamashitaKevin StevulakJeff RysinskiDavid EstradaShi YanTakuji SoenoTomohiro NakamuraTetsuya HayashidaHiroshi ShimamotoBarmak Mansoorian
Published in: ISSCC (2015)
Keyphrases
  • high speed
  • low power
  • real time
  • frame rate
  • cmos image sensor
  • single chip
  • parallel processing