A Highly Parallel FPGA-based Evolvable Hardware Architecture.
Fabio CancareMarco CastagnaMatteo RenestoDonatella SciutoPublished in: PARCO (2009)
Keyphrases
- highly parallel
- hardware architecture
- hardware implementation
- efficient implementation
- parallel architectures
- field programmable gate array
- hardware architectures
- computing systems
- single chip
- associative memory
- single pass
- general purpose
- parallel computing
- data analysis
- stream processing
- parallel programming
- image processing algorithms
- hardware design
- real time
- embedded systems
- parallel processing
- parallel algorithm
- low cost
- image processing