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A 90nm CMOS Bio-potential Signal Readout Front-end with Improved Powerline Interference Rejection.
Chon-Teng Ma
Pui-In Mak
Mang I Vai
Peng Un Mak
Sio-Hang Pun
Feng Wan
Rui Paulo Martins
Published in:
ISCAS (2009)
Keyphrases
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received signal
noise ratio
high frequency
power consumption
neural network
low cost
high speed
low power
back end
cmos technology
power line
power supply
direct sequence spread spectrum
frequency hopping
frequency domain
signal detection
nm technology
wavelet transform