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Automatic modeling of switch-level networks using partial orders [MOS circuits].

Prathima AgrawalScott H. RobinsonThomas G. Szymanski
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1990)
Keyphrases
  • partial order
  • high speed
  • partially ordered
  • total order
  • semi automatic
  • higher level
  • social networks
  • partial ordering
  • high dimensional
  • lattice structure
  • vertex cover
  • totally ordered
  • data structure
  • analog circuits