Evaluation of stereo correspondence algorithms and their implementation on FPGA.
Carlos Colodro-CondeF. Javier Toledo-MoreoRafael Toledo-MoreoJ. Javier Martínez-ÁlvarezF. Javier Garrigós-GuerreroJosé Manuel Ferrández de VicentePublished in: J. Syst. Archit. (2014)