I/O Implementation and Evaluation of Parallel Pipelined STAP on High Performance Computers.
Wei-keng LiaoAlok N. ChoudharyDonald D. WeinerPramod K. VarshneyPublished in: HiPC (1999)
Keyphrases
- ibm sp
- parallel processing
- parallel computers
- computer simulation
- computer architecture
- distributed memory
- parallel implementation
- parallel architecture
- pc cluster
- highly parallel
- graphics processing units
- evaluation model
- distributed memory machines
- massively parallel
- evaluation method
- data flow
- linear array
- embedded systems
- input output