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High-Speed ASIC Implementation of Paillier Cryptosystem with Homomorphism.

Chun CaiHiromitsu AwanoMakoto Ikeda
Published in: ASICON (2019)
Keyphrases
  • high speed
  • hardware architecture
  • low power
  • hardware implementation
  • circuit design
  • efficient implementation
  • design methodology
  • low cost
  • data sets
  • data model
  • application specific
  • computing systems
  • single chip