Giga bit per second per pin differential CMOS circuits for pseudo ECL signaling.
Hormoz DjahanshahiFlemming HansenC. André T. SalamaPublished in: CICC (1999)
Keyphrases
- flip flops
- random access memory
- power dissipation
- cmos technology
- delay insensitive
- analog vlsi
- design considerations
- circuit design
- high speed
- multiple input
- low voltage
- power consumption
- vlsi circuits
- shift register
- low power
- floating gate
- power reduction
- magnetic tape
- real time
- block cipher
- nm technology
- analog to digital converter