Design of a Strong-Arm Dynamic-Latch based comparator with high speed, low power and low offset for SAR-ADC.
Sounak DuttaPublished in: CoRR (2022)
Keyphrases
- low power
- high speed
- single chip
- low power consumption
- power consumption
- low cost
- vlsi architecture
- logic circuits
- digital signal processing
- cmos technology
- power dissipation
- high power
- gate array
- ultra low power
- power reduction
- mixed signal
- vlsi circuits
- real time
- image sensor
- wireless transmission
- frame rate
- nm technology
- analog to digital converter