Low-voltage 1.9-GHz front-end receiver in 0.5-μm CMOS technology.

Eyad Abou-Allam John J. Nisbet Michael C. Maliepaard

Published in: IEEE J. Solid State Circuits (2001)

Keyphrases

low voltage
cmos technology
low power
clock frequency
high speed
power consumption
parallel processing
design considerations
random access memory
power dissipation
power management
image sensor
low cost
digital signal processing
hardware and software
routing protocol
mixed signal