Reduction of short circuit current in static CMOS inverters using novel smart delay generator circuits.
Yasser S. AbdallaPublished in: Elektrotech. Informationstechnik (2012)
Keyphrases
- short circuit
- power dissipation
- power consumption
- low power
- power reduction
- cmos technology
- thin film
- chip design
- analog vlsi
- digital signal processing
- vlsi circuits
- high speed
- low voltage
- finite state machines
- circuit design
- genetic algorithm
- induction motor
- simulation model
- delay insensitive
- random access memory
- floating gate
- artificial neural networks