An Area Optimized 2.5-V 10-b 200-MS/s 200-μA CMOS DAC.

Babak Nejati Lawrence Larson

Published in: CICC (2006)

Keyphrases

vlsi circuits
low cost
high speed
machine learning
power consumption
low power
power supply
learning algorithm
image sensor
pac man
database
random access memory
delay insensitive
single chip
steady state
databases
real time