Refining Task Specifications using Model Checking.
Anand YeolekarRavindra MettaR. VenkateshSamarjit ChakrabortyPublished in: RTCSA (2018)
Keyphrases
- model checking
- automated verification
- model checker
- formal specification
- bounded model checking
- transition systems
- temporal logic
- formal verification
- concurrent systems
- reactive systems
- finite state machines
- finite state
- symbolic model checking
- formal methods
- specification language
- pspace complete
- partial order reduction
- verification method
- process algebra
- reachability analysis
- computation tree logic
- epistemic logic
- asynchronous circuits
- temporal properties
- linear temporal logic
- automated reasoning
- deterministic finite automaton
- binary decision diagrams
- set theory
- description language
- theorem proving
- modal logic
- markov chain