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Development of a VLSI chip for real time MPEG-2 video decoder.
Eishi Morimatsu
Kiyoshi Sakai
Koichi Yamashita
Mitsuhito Ohta
Hideki Miyasaka
Kiyoshi Maeda
Hisakazu Ogura
Naoyuki Takeshita
Published in:
ICIP (3) (1995)
Keyphrases
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real time
video decoder
low power consumption
high speed
low cost
single chip
multimedia
vlsi implementation
software engineering
signal processing
vlsi design
low power
platform independent
memory subsystem
power consumption
development process