A Mesh-of-Trees Interconnection Network for Single-Chip Parallel Processing.

Aydin O. Balkan Gang Qu Uzi Vishkin

Published in: ASAP (2006)

Keyphrases

parallel processing
interconnection networks
single chip
parallel computers
cmos image sensor
low power
fault tolerant
parallel algorithm
low cost
multistage
message passing
routing algorithm
parallel architectures
parallel programming
image sensor
high speed
pairwise
power consumption
higher order