Highly Interleaved 5-bit, 250-MSample/s, 1.2-mW ADC With Redundant Channels in 65-nm CMOS.
Brian P. GinsburgAnantha P. ChandrakasanPublished in: IEEE J. Solid State Circuits (2008)
Keyphrases
- analog to digital converter
- power consumption
- nm technology
- power supply
- hd video
- cmos technology
- low power
- low cost
- random access memory
- multi channel
- cmos image sensor
- single chip
- image sensor
- high speed
- highly redundant
- silicon on insulator
- high definition
- power reduction
- neural network
- communication channels
- mixed signal
- low voltage
- real time
- metal oxide semiconductor
- parallel processing
- image processing