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Accelerating 2D FFT with Non-Power-of-Two Problem Size on FPGA.
Wendi Wang
Bo Duan
Chunming Zhang
Peiheng Zhang
Ninghui Sun
Published in:
ReConFig (2010)
Keyphrases
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signal processing
power consumption
real time
case study
high speed
field programmable gate array
image processing
low cost
fourier transform
fast fourier transform
power reduction
standard deviation
maximum number