Compiling for instruction cache performance on a multithreaded architecture.

Rakesh Kumar Dean M. Tullsen

Published in: MICRO (2002)

Keyphrases

memory hierarchy
multithreading
cache misses
computing power
level parallelism
main memory
parallel computing
instruction set
multi user
management system
real time
memory access
computational power
parallel processing
software architecture
mutual exclusion
data structure
multimedia