A 10 Gb/s low-power serdes receiver based on a hybrid speculative/SAR digitization technique.
Arash Zargaran-YazdShahriar MirabbasiRes SalehPublished in: ISCAS (2011)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- high power
- wireless transmission
- single chip
- vlsi architecture
- synthetic aperture radar
- vlsi circuits
- digital signal processing
- received signal
- power saving
- logic circuits
- real time
- low power consumption
- image sensor
- signal processor
- mixed signal
- cmos technology
- sar images
- computer simulation