Low-power HEVC binarizer architecture for the CABAC block targeting UHD video processing.
Camila de Matos AlonsoFábio Luís Livi RamosBruno ZattMarcelo Schiavon PortoSergio BampiPublished in: SBCCI (2017)
Keyphrases
- low power
- video processing
- vlsi architecture
- video compression
- low cost
- high speed
- power consumption
- real time
- video coding
- cmos technology
- video analysis
- video segmentation
- mixed signal
- image processing
- video surveillance
- motion estimation
- low power consumption
- intra prediction
- coding efficiency
- signal processing
- logic circuits
- nm technology
- low complexity
- macroblock
- motion compensation
- computer vision
- motion compensated
- video quality
- power dissipation
- rate distortion
- motion vectors
- hardware implementation
- compression ratio
- video codec
- image enhancement
- video data
- bit rate