Vertical interconnects squeezing in symmetric 3D mesh Network-on-Chip.
Cheng LiuLei ZhangYinhe HanXiaowei LiPublished in: ASP-DAC (2011)
Keyphrases
- d mesh
- network on chip
- power dissipation
- power consumption
- cmos technology
- routing algorithm
- low power
- d objects
- network simulator
- three dimensional
- skeleton extraction
- multi processor
- shape descriptors
- digital signal processing
- geometric properties
- data transfer
- viewpoint
- interconnection networks
- multipath
- shape analysis
- multistage
- high speed