Low-Cost Space-Borne Processing on a Reconfigurable Parallel Architecture.
Timo Rolf BretschneiderB. RameshV. GuptaIan McLoughlinPublished in: ERSA (2004)
Keyphrases
- computer vision
- parallel architecture
- low cost
- systolic array
- hardware implementation
- parallel processing
- signal processing
- shared memory
- pattern recognition
- high level synthesis
- real time
- processing elements
- distributed memory
- parallel implementation
- field programmable gate array
- synthetic aperture sonar
- low power
- reconfigurable hardware
- dynamic programming
- embedded systems
- special case