Low-power design technique for flash A/D converters based on reduction of the number of comparators.

Takahide Sato Shigetaka Takagi Nobuo Fujii

Published in: ISCAS (2007)

Keyphrases

low power
low cost
high speed
power consumption
single chip
vlsi architecture
power reduction
low power consumption
logic circuits
real time
circuit design
digital signal processing
cmos technology
high power
vlsi circuits
wireless transmission
power dissipation
wireless networks
general purpose
image processing