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Direct Synthesis of Hazard-Free Asynchronous Circuits from STGs Based on Lock Relation and BG-Decomposition Approach.
Kuan-Jen Lin
Jih-Wen Kuo
Chen-Shang Lin
Published in:
EDAC-ETC-EUROASIC (1994)
Keyphrases
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asynchronous circuits
model checking
process algebra
delay insensitive
functional decomposition
concurrency control
bayesian networks
search algorithm
high speed
temporal logic
decomposition algorithm
logic synthesis