Boosting timestamp-based transactional memory by exploiting hardware cycle counters.
Wenjia RuanYujie LiuMichael F. SpearPublished in: ACM Trans. Archit. Code Optim. (2013)
Keyphrases
- transactional memory
- blue gene
- speculative execution
- massively parallel
- hardware design
- parallel architectures
- commodity hardware
- field programmable gate array
- computing systems
- parallel execution
- low cost
- parallel computing
- real time
- address space
- hardware and software
- hardware implementation
- parallel programming
- parallel processing
- high performance computing
- single chip
- embedded systems
- signal processing
- wireless sensor networks
- query processing