Discrete-time battery models for system-level low-power design.
Luca BeniniGiuliano CastelliAlberto MaciiEnrico MaciiMassimo PoncinoRiccardo ScarsiPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2001)
Keyphrases
- low power
- single chip
- low cost
- power consumption
- high speed
- low power consumption
- logic circuits
- gate array
- mixed signal
- vlsi architecture
- power reduction
- wireless transmission
- digital signal processing
- power dissipation
- high power
- vlsi circuits
- wireless networks
- design process
- hardware and software
- cmos technology
- delay insensitive
- ultra low power