Low-power and error protection coding for network-on-chip traffic.
Arseni VitkovskiAxel JantschRobert LauterRaimo HaukilahtiErland NilssonPublished in: IET Comput. Digit. Tech. (2008)
Keyphrases
- low power
- network on chip
- power dissipation
- cmos technology
- power consumption
- low cost
- single chip
- high speed
- routing algorithm
- coding scheme
- digital signal processing
- network simulator
- multi processor
- data transfer
- image sensor
- interconnection networks
- low density parity check
- error propagation
- mobile ad hoc networks
- network traffic
- end to end